WHY IT MATTERS: Digital Transformation

What is wafer-scale integration? A wafer is a circle, today about 12 inches in diameter. A chip is typically a square no more than an inch on a side — much smaller than a wafer. Many copies of the same chip are printed onto the wafer. They are arranged into a grid with spaces called scribe lines between them. The wafer is then cut along those scribe lines into individual chips. The chips are tested, and after any defective ones are discarded, the rest can be packaged and sold. Wafer-scale integration is the idea that you make a single chip out of the whole wafer. You skip the step above concerning cutting the wafer up — with one chip there is nothing to cut.

The WSE (pronounced “wise”) is the largest commercial chip ever manufactured, built to solve the problem of deep learning compute. The WSE is 1.2 trillion transistors, packed onto a single 215mm x 215mm chip with 400,000 AI-optimized cores, connected by a 100Pbit/s interconnect. The cores are fed by 18 GB of super-fast, on-chip memory, with an unprecedented 9 PB/s of memory bandwidth.

Superlatives abound at Cerebras, the until-today stealthy next-generation silicon chip company looking to make training a deep learning model as quick as buying toothpaste from Amazon. Launching after almost three years of quiet development, Cerebras introduced its new chip today — and it is a doozy.